Top 742 Design verification engineer Jobs in Leander, Tx

Digital Design Verification Engineer
OLIX —Austin, TX
- $123,000 a year
- Full-time
- 5 years
- Office
- Residential
- Retirement plan
Design Verification Engineer (remote position)
Correct Designs —Austin, TX
- Contract
- Mid-level
- 3 years
- Analysis skills
- Health insurance
- Retirement plan
Quick Apply
CPU Design Verification Engineer
Apple —Austin, TX
- Computer science
- Computer Science
- Bachelor of Science
PCB Design Engineer - High Speed Multilayer Systems (JC910)
ilocatum —Austin, TX
- $100,000 - $140,000 a year
- Full-time
- Mid-level
- Mentoring
- Electrical Engineering
- Paid holidays
- Health insurance
Quick Apply
Verification Engineer
Experis —Austin, TX
- Contract
- Mid-level
- Analysis skills
- Leadership
Quick Apply
4d
Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
NVIDIA —Austin, TX
- $136,000 - $264,500 a year
- Full-time
- Computer science
- Computer Science
- 5 years
Senior Design Verification Engineer – High Performance CPU Core
SiFive —Austin, TX
- Full-time
- Computer Science
- Master's degree
- US work authorization
- Health insurance
- Paid time off
Design Verification Engineer
Correct Designs —Austin, TX
- Contract
- Computer Science
- Software troubleshooting
- Mid-level
- Health insurance
- Retirement plan
Quick Apply
Senior Software Engineer
Atom Computing —Austin, TX
- $140,000 - $185,000 a year
- Full-time
- Hybrid work
- Computer science
- Azure
- Computer Science
- Disability insurance
- Health insurance
Quick Apply
FPGA Design Engineer III
Firefly Aerospace —Cedar Park, TX
- Full-time
- 3 years
- Analysis skills
- Senior level
- Disability insurance
- Health insurance
Quick Apply
VLSI Design Engineer
Retym —Austin, TX
- Full-time
- 5 years
- Bachelor of Science
- Senior level
Electronics Engineer
KRUSH Tech Inc —Austin, TX
- Full-time
- Analysis skills
- Senior level
- Electrical Engineering
- Health insurance
- Paid time off
Quick Apply
Electrical Engineer
Agility Technical Solutions —Austin, TX
- $75,000 - $130,000 a year
- Full-time
- Background check
- Laboratory experience
- No experience needed
- Health insurance
- Dental insurance
Quick Apply
SoC Verification Engineer
Insilico —Austin, TX
- Contract
- Mid-level
Quick Apply
Design Verification Engineer
Apple —Austin, TX
- Mid-level
- Master's degree
- Analysis skills
3d
Design Verification Engineer
Velaura —Austin, TX
- $150,000 - $250,000 a year
- Full-time
- Mid-level
- Health insurance
- Dental insurance
Quick Apply
Staff Design Verification Engineer – High Performance CPU Core
SiFive —Austin, TX
- Full-time
- 7 years
- Computer Science
- Bachelor of Science
- Health insurance
- Paid time off
Senior Fullstack Software Engineer
NVIDIA —Austin, TX
- $184,000 - $356,500 a year
- Full-time
- Hybrid work
- Computer science
- 6 years
- Computer Science
ASIC Engineer, Design Verification
Meta —Austin, TX
- $114,000 - $172,000 a year
- Computer science
- Computer Science
- Mid-level
CPU Core Design Verification Engineer
Advanced Micro Devices, Inc —Austin, TX
- Hybrid work
- Master's degree
- C++
- Senior level

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Digital Design Verification Engineer

OLIX
Austin, TX

Apply Now

Job Details

Full-time
$123,000 a year

Benefits

Stock options
Retirement plan

Qualifications

Digital circuit design
Real-time data processing implementation

Full Job Description

About OLIX

AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a ten-year-old hardware blueprint that has reached its limit. A new paradigm that is faster and more efficient will be the biggest economic opportunity of the next century and create the most important company of the next decade. The OLIX Decode Accelerator 1 (DX-1) is the first accelerator architected specifically for decode. Rack-scale co-design of logic, data movement, packaging, optics and interconnect enables a step change in system level performance.

The Role

We are seeking highly skilled and motivated Senior / Staff Digital Verification Engineers with a strong background in CMOS digital design and verification to take ownership of the functional correctness of high-speed, real-time data-processing silicon, from early algorithm modelling through verified RTL, sign-off, and silicon bring-up.

You will join a multidisciplinary group creating groundbreaking hardware where digital, optical, and mixed-signal domains intersect.

The ideal candidate brings deep expertise in digital verification methodologies, a solid understanding of hardware architecture, and a passion for building provably correct, high-performance systems that underpin breakthrough AI hardware.

Responsibilities

Own end-to-end verification of high-throughput digital pipelines supporting multi-GSPS input rates, continuous streaming data paths, deep pipelining, and robust hand-shaking in advanced CMOS nodes
Develop and maintain comprehensive verification environments using SystemVerilog/UVM, including constrained-random testing, coverage closure, and regression automation
Define and implement assertion-based verification strategies for control logic, data-path correctness, CDC/RDC, and protocol compliance
Apply formal verification techniques (property checking, assertions, equivalence checking) to complement simulation-based verification and accelerate bug discovery
Model and validate algorithms using MATLAB/Simulink or Python, ensuring functional equivalence from algorithmic models through RTL and gate-level sign-off
Support FPGA prototyping and silicon bring-up by developing targeted testcases, debug strategies, and post-silicon validation plans
Collaborate closely with digital design, optical-hardware, mixed-signal, and software teams to ensure correct integration across clock domains, interfaces, and firmware abstractions
Analyse verification results to identify root causes, drive design fixes, and improve verification efficiency and reuse
Contribute to verification methodology development, documentation, and design/verification reviews; mentor junior engineers where appropriate

Skills & Experience

5+ years of hands-on experience in digital verification for high-performance ASICs or SoCs
Ownership of verification for at least one complex block or subsystem processing continuous real-time data streams
Strong proficiency in SystemVerilog, assertions (SVA), and modern verification methodologies (e.g. UVM. CocoTB)
Proven experience verifying designs operating in GHz-class clock domains, including CDC/RDC analysis
Familiarity with industry-standard EDA flows: RTL simulation, formal verification, linting, CDC/RDC, STA, power-intent (UPF/CPF), and gate-level simulation
Experience verifying high-speed IP such as SerDes, DDR/HBM, PCIe, Ethernet, or similar interfaces
Proficiency with MATLAB/Simulink or Python/NumPy for algorithm modelling, fixed-point analysis, and test-vector generation
Solid grounding in digital design principles, computer architecture, DSP fundamentals, and semiconductor basics
Clear communicator who collaborates effectively across disciplines and is comfortable operating in a fast-moving, evolving environment

Nice to have

Tape-out experience on an advanced process node
Deep hands-on experience with formal verification methodologies, including property decomposition, and coverage-driven formal on tools such as Jasper
Exposure to coherent optical links or photonic-electronic co-design
Familiarity with AI/ML workloads, systolic arrays, or tensor-processing architectures
Expertise in arithmetic pipeline verification
Expertise in processor and ISA verification
Contributions to open-source RTL, verification frameworks, or FPGA platforms

Compensation & Equity

Competitive Salary: Commensurate with your experience, skills, and location
Equity & Ownership: Meaningful stock options. You’re not just joining the mission; you’re owning a piece of it
Proximity Bonus: We value your time. To minimise your commute and maximise your life, we offer an annual Living-Local Bonus if your residence is within 20 minutes of the office
Retirement Benefits: Employer-contributed retirement plans to help you build long-term financial security.

Due to U.S. export control regulations, candidates’ eligibility to work at OLIX depends on their most recent citizenship or permanent residency status. We are generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela). Applicants who have subsequently obtained citizenship or permanent residency in another country not subject to these restrictions may still be eligible.

Compensation Range: £123K

Apply Now

Refine Your Search

design verification engineer jobs in leander, tx

Digital Design Verification Engineer

Design Verification Engineer (remote position)

CPU Design Verification Engineer

PCB Design Engineer - High Speed Multilayer Systems (JC910)

Verification Engineer

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

Senior Design Verification Engineer – High Performance CPU Core

Design Verification Engineer

Senior Software Engineer

FPGA Design Engineer III

VLSI Design Engineer

Electronics Engineer

Electrical Engineer

SoC Verification Engineer

Design Verification Engineer

Design Verification Engineer

Staff Design Verification Engineer – High Performance CPU Core

Senior Fullstack Software Engineer

ASIC Engineer, Design Verification

CPU Core Design Verification Engineer

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