Top 234 Design verification engineer Jobs in Phoenix Az

Hardware Design Engineer
Viasat, Inc. —Tempe, AZ
- $132,500 - $246,500 a year
- Online Application
- Laboratory experience
- Master's degree
- Travel
Career Accelerator Program - Design Verification Engineer- MS/PhD
Texas Instruments —Phoenix, AZ
- Mid-level
- Master's degree
- Continuous improvement
1d
Design Verification Engineer
Cirrus Logic —Chandler, AZ
- Full-time
- Hybrid work
- Master's degree
- Doctor of Philosophy
- Senior level
Staff Design Verification Engineer (AI/ML)
Analog Devices —Chandler, AZ
- Day shift
- 7 years
- Analysis skills
- Doctor of Philosophy
Controls Engineer
Design Group —Phoenix, AZ
- Full-time
- Background check
- Pass drug screening
- Mid-level
Electrical Engineer - Power Distribution Systems (Medium Voltage) – Municipal Water Infrastructure
West Yost —Phoenix, AZ
- $109,315 - $180,685 a year
- Full-time
- Hybrid work
- Microsoft Excel
- Microsoft Outlook
- Mid-level
- Travel reimbursement
- Profit sharing
Quick Apply
Lead Hardware Engineer
Cyient —Phoenix, AZ
- $130,000 - $135,000 a year
- Full-time
- Hybrid work
- Laboratory experience
- Analysis skills
- In-person
Quick Apply
Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $135,396 - $150,205 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $182,139 - $202,060 a year
- Full-time
- Hybrid work
- Data analysis skills
- Research
- Master's degree
- Paid parental leave
- Health insurance
Advanced ASIC FPGA Design Engineer for Crypto and Cross Domain Solutions
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $135,396 - $150,205 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
Staff FPGA Digital Engineer - 5
Northrop Grumman —Chandler, AZ
- $108,200 - $162,400 a year
- Overtime
- 8 years
- Doctor of Philosophy
- Travel
- Paid holidays
- Disability insurance
2d
Principal Optical Engineer - 3
Northrop Grumman —Chandler, AZ
- $108,200 - $162,400 a year
- Overtime
- Laboratory experience
- Analysis skills
- Doctor of Philosophy
- Paid holidays
- Disability insurance
Sr Systems Engineer - 30334_SV
BEPC Inc —Phoenix, AZ
- $91 - $101 an hour
- Full-time
- Hybrid work
- Background check
- Computer Science
- CAD
- Health insurance
- Dental insurance
Quick Apply
FPGA Digital Engineer - 2
Northrop Grumman —Chandler, AZ
- $87,200 - $130,800 a year
- Overtime
- Mid-level
- Master's degree
- Travel
- Paid holidays
- Disability insurance
Principal FPGA Digital Engineer - 3
Northrop Grumman —Chandler, AZ
- $108,200 - $162,400 a year
- Overtime
- Analysis skills
- Doctor of Philosophy
- Travel
- Paid holidays
- Disability insurance
Principal Engineer Electrical
Northrop Grumman —Gilbert, AZ
- $98,400 - $147,600 a year
- Overtime
- 5 years
- Research
- Master's degree
- Paid holidays
- Disability insurance
2d
RF Systems Engineer
General Dynamics Mission Systems, Inc —Scottsdale, AZ
- $112,924 - $125,275 a year
- Full-time
- Hybrid work
- Microsoft Access
- Management
- 3 years
Sr. Principal EO Signal Image Processing Engineer - 4
Northrop Grumman —Chandler, AZ
- $122,800 - $184,200 a year
- Overtime
- Doctor of Philosophy
- Travel
- Mentoring
- Paid holidays
- Disability insurance
2d
Sr. Principal EO Signal Image Processing Engineer - 4
Northrop Grumman —Chandler, AZ
- $135,000 - $202,600 a year
- Overtime
- Doctor of Philosophy
- Travel
- Mentoring
- Paid holidays
- Disability insurance
2d
Principal EO Signal Image Processing Engineer - 3
Northrop Grumman —Chandler, AZ
- $108,200 - $162,400 a year
- Overtime
- Laboratory experience
- Analysis skills
- Doctor of Philosophy
- Paid holidays
- Disability insurance
2d

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Hardware Design Engineer

Viasat, Inc. -
Tempe, AZ

Apply Now

Job Details

Full-time
$132,500 - $246,500 a year

Qualifications

Tooling
FPGA
Firmware
Laboratory experience
Firmware development
Electrical engineering training
Design engineering
Printed circuit board (PCB) layout
FPGA circuit design
Debugging

Full Job Description

About us:

One team. Global challenges. Infinite opportunities. At Viasat, we’re on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We’re looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.

What you'll do:

As a Hardware Engineer, you will help build advanced digital processing systems, high-speed digital boards, and FPGA-based subsystems. These components serve space-based and critical communication platforms.
You will serve as a key technical contributor, bridging the hardware-firmware boundary by owning the hardware lifecycle of complex board builds. This includes high-speed digital circuit development, SoC integration, and mixed-signal circuit crafting with high-resolution ADC/DAC interfaces. At the same time, you will develop, simulate, and implement high-speed signal-processing algorithms and network protocols in FPGAs.
Your responsibility will span the entire product development lifecycle from early conceptual requirements, block diagrams, and synthesizable RTL development (SystemVerilog/VHDL), through hardware-firmware co-design, board-level bring-up, and laboratory integration, all the way to worst-case analysis (WCA), power/signal integrity verification, and flight qualification in a rigorous space and flight environment.

The day-to-day:

Build and implement high-speed digital boards, including crafting detailed circuit diagrams and layout guidelines.
Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data processing, and communication functions.
Integrate and deploy firmware onto FPGA and FPGA SoC platforms.
Design high-speed interfaces (DDR4, SERDES, UART, I2C, SPI, LVDS) and perform signal/power integrity simulations using HyperLynx.
Conduct worst-case analysis (WCA) to verify electrical design margins across space environment conditions.
Lead laboratory board bring-up, hardware/firmware integration, and debug using logic analyzers, oscilloscopes, and spectrum analyzers.
Apply flight hardware and firmware design practices, working within radiation-tolerant, high-reliability component and thermal constraints.
Author and maintain comprehensive design documentation, including schematics, block diagrams, testbenches, and interface control documents.

What you'll need:

Bachelor’s Degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field.
4+ years of combined experience in high-speed digital board design and FPGA/RTL development.
Proficiency in writing synthesizable RTL in SystemVerilog, Verilog, or VHDL.
Hands-on experience with FPGA design suites and EDA tools (e.g., AMD/Xilinx Vivado, Intel/Altera Quartus, Synopsys/Synplify).
Hands-on experience with tools to build captures (e.g., Mentor Xpedition, Cadence, or Altium).
Strong laboratory debugging skills integrating firmware onto physical target boards.
US citizenship.
Ability to travel up to 10%.

What will help you on the job:

Master’s Degree in Electrical Engineering (MSEE).
Experience with space-grade FPGAs (Xilinx Radiation Tolerant, Microchip RTG4, or equivalent).
Experience with FPGA simulation and testbench development (ModelSim, Questa, etc.).
Familiarity with scripting languages (Python, TCL, or Perl) for automation.
Experience with EEE-INST-002, NASA, or ESA parts selection, screening, and derating guidelines.
Familiarity with radiation effects on electronics (TID, SEE, SEL).
Familiarity with Git, CI/CD practices, and AI development tools (Claude Code, Copilot).

Salary range: $132,500.00 - $209,500.00 / annually. For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $164,500.00- $246,500.00/ annually : At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as your background and experience. Base pay may vary depending on job-related knowledge, skills, and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition to a range of medical, financial, and/or other benefits, dependent on the position offered. Learn more about Viasat’s comprehensive benefit offerings that are focused on your holistic health and wellness at https://careers.viasat.com/benefits. EEO statement:

Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic. If you would like to request an accommodation on the basis of disability for completing this on-line application, please click here.

Apply Now

Refine Your Search

design verification engineer jobs in phoenix az

Hardware Design Engineer

Career Accelerator Program - Design Verification Engineer- MS/PhD

Design Verification Engineer

Staff Design Verification Engineer (AI/ML)

Controls Engineer

Electrical Engineer - Power Distribution Systems (Medium Voltage) – Municipal Water Infrastructure

Lead Hardware Engineer

Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions

Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)

Advanced ASIC FPGA Design Engineer for Crypto and Cross Domain Solutions

Staff FPGA Digital Engineer - 5

Principal Optical Engineer - 3

Sr Systems Engineer - 30334_SV

FPGA Digital Engineer - 2

Principal FPGA Digital Engineer - 3

Principal Engineer Electrical

RF Systems Engineer

Sr. Principal EO Signal Image Processing Engineer - 4

Sr. Principal EO Signal Image Processing Engineer - 4

Principal EO Signal Image Processing Engineer - 3

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