Top 28 microelectronics engineer Jobs in san jose ca

SoC Digital Design Engineer, Multimedia Lab
TikTok —San Jose, CA
- $156,000 - $316,800 a year
- Computer Science
- Mid-level
- Analysis skills
- Paid parental leave
- Paid holidays
SoC Digital Verification Engineer, Multimedia Lab
TikTok —San Jose, CA
- $156,000 - $316,800 a year
- Computer Science
- Mid-level
- Analysis skills
- Paid parental leave
- Paid holidays
Senior SoC Digital Design Engineer, Multimedia Lab
TikTok —San Jose, CA
- $212,800 - $450,000 a year
- Computer Science
- 3 years
- Analysis skills
- Paid parental leave
- Paid holidays
Analog Engineer
Credo —San Jose, CA
- $120,000 - $140,000 a year
- Data analysis skills
- Mid-level
- Master's degree
- Health insurance
Staff R&D Engineer (Catheter & Mechanical Systems) - NuevoSono
T45 Labs —Santa Clara, CA
- $130,000 - $176,000 a year
- Email
- Office
- Master's degree
- 8 years
Quick Apply
Senior SoC Digital Verification Engineer, Multimedia Lab
TikTok —San Jose, CA
- $212,800 - $450,000 a year
- Computer Science
- 3 years
- Analysis skills
- Paid parental leave
- Paid holidays
Automation Engineer (Machine Design)
Six Sigma/Winslow Automation Inc. —Milpitas, CA
- $90,000 - $130,000 a year
- Full-time
- Bachelor of Science
- Mid-level
- Bachelor's degree
- Profit sharing
- Disability insurance
Quick Apply
Senior Engineer I - Product (New Product Introduction)
Microchip Technology —San Jose, CA
- $70,304 - $163,000 a year
- Full-time
- Computer science
- Computer Science
- 3 years
- Employee stock purchase plan
- Health insurance
Semiconductor Process Engineer
UST Global —Santa Clara, CA
- $70,000 - $105,000 a year
- Master's degree
- Fair chance
- 1 year
- Paid jury duty
- Health savings account
Electrical Technician
FST Technical Services —Santa Clara, CA
- $30 - $40 an hour
- 12 hour shift
- Mid-level
- US work authorization
Process Development Engineer
Centrillion Technologies, Inc. —Palo Alto, CA
- $70,000 - $85,000 a year
- Bachelor of Science
- Mid-level
- Bachelor's degree
- Health insurance
- Opportunities for advancement
Senior Staff Engineer Test Technology & Solutions ATE 93K tester
Infineon Technologies AG —San Jose, CA
- $147,400 - $202,700 a year
- Full-time
- Background check
- 5 years
- Pass drug screening
R&D Engineer IC Design
Broadcom —San Jose, CA
- $120,000 - $192,000 a year
- Full-time
- 6 years
- Mid-level
- Master's degree
- Employee stock purchase plan
- Paid holidays
Principal Optoelectronic Packaging Engineer
Samtec, Inc —Santa Clara, CA
- $180,000 - $250,000 a year
- Full-time
- Bachelor of Science
- 11+ years
- Mentoring
- Profit sharing
- Health savings account
Field Application Engineer
VAT Vakuumventile —San Jose, CA
- English
- Mid-level
- Business development
1d
Space Radiation Engineer, AI Hardware
Tesla —Palo Alto, CA
- $160,000 - $414,000 a year
- Full-time
- 5 years
- Analysis skills
- In-person
- Commuter assistance
- Health savings account
Validation Engineering IP Program Manager, Principal
Marvell —Santa Clara, CA
- $173,280 - $259,600 a year
- Full-time
- Computer Science
- 5 years
- Bachelor of Science
- Employee stock purchase plan
Package Development, Signal Integrity and Power Integrity Engineer, Senior Staff
Marvell —Santa Clara, CA
- $141,150 - $211,400 a year
- Full-time
- Computer Science
- 3 years
- Master's degree
- Employee stock purchase plan
SSRL Beamline Operations Engineer (SE2)
SLAC National Accelerator Laboratory —Menlo Park, CA
- $134,906 - $164,965 a year
- Extended hours
- Analysis skills
- University
- Senior level
Team Lead, Field Application Engineer
VAT Vakuumventile —San Jose, CA
- English
- Supervising experience
- Product management

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microelectronics engineer jobs near san jose ca

SoC Digital Design Engineer, Multimedia Lab

TikTok -
San Jose, CA

Apply Now

Job Details

$156,000 - $316,800 a year

Benefits

Paid parental leave
Paid holidays
Disability insurance
Health insurance
Dental insurance
RSU
Parental leave
Vision insurance
401(k) matching
Life insurance
Paid sick time

Qualifications

Automation
Verilog
Digital circuit design

Full Job Description

Technology

SoC Digital Design Engineer, Multimedia Lab

Location
:

San Jose

Employment Type
:

Regular

Job Code
:

A231202

Responsibilities

About the team:
Our team is building industry-leading, highly efficient, and scalable video codec hardware solutions (FPGA and ASIC) from the ground up to better serve billions of users. We are looking for strong video codec design engineers to design hardware accelerators for advanced video encoding and processing. The successful candidate will be part of a fast-growing team that includes algorithm, architecture, software, firmware, and hardware design and verification experts with a dedication to technical excellence and a passion to build large-scale and high-performing video platforms and services.

Responsibilities

Architecture Design: Participate in defining the architecture of SoC top or subsystems (NoC/CPU/NPU/ISP/Codec), and conduct PPA (Power, Performance, Area) evaluation during the early design phase.
RTL Implementation: Write high-quality, well-structured RTL code (Verilog/SystemVerilog) and maintain related design documentation.
Front-End Quality Control: Perform Lint, CDC (Clock Domain Crossing), and RDC (Reset Domain Crossing) checks to ensure code standard compliance and design robustness.
Cross-Functional Collaboration: Work closely with the Verification team for debugging and achieving Coverage closure; collaborate with the Backend/Mid-end teams to support Synthesis, SDC (Synopsys Design Constraints) generation, STA (Static Timing Analysis), and power optimization.
Low Power Design: Participate in the formulation of chip low-power strategies, proficiently apply Clock Gating and Power Gating techniques, and support the UPF (Unified Power Format) flow.

Qualifications

Minimum Qualifications:

Bachelor's degree or higher in Microelectronics, Integrated Circuits, Computer Science, Electrical Engineering, or a related field.
1+ years of experience in digital front-end design (open to highly promising candidates with less experience).
Mastery of Verilog/SystemVerilog and a solid foundation in digital circuits.
Proficiency with mainstream front-end EDA tools (e.g., Spyglass, Design Compiler, PrimeTime).
Fluent in at least one scripting language (Python, Perl, Tcl, Makefile) for workflow automation.

Preferred Qualifications:

Deep understanding of NPU architecture, HW/SW co-design and AI hardware acceleration.
Proven experience in SoC-level performance profiling and bottleneck analysis.
Hands-on experience in the integration of complex SoC core subsystems (e.g., CPU/NPU clusters, Memory subsystems).
Successful tape-out experience in advanced process nodes (7nm/5nm/3nm)

Job Information

【For Pay Transparency】Compensation Description (Annually)

The base salary range for this position in the selected city is $156000 - $316800 annually.

Compensation may vary outside of this range depending on a number of factors, including a candidate’s qualifications, skills, competencies and experience, and location. Base pay is one part of the Total Package that is provided to compensate and recognize employees for their work, and this role may be eligible for additional discretionary bonuses/incentives, and restricted stock units.

Benefits may vary depending on the nature of employment and the country work location. Employees have day one access to medical, dental, and vision insurance, a 401(k) savings plan with company match, paid parental leave, short-term and long-term disability coverage, life insurance, wellbeing benefits, among others. Employees also receive 10 paid holidays per year, 10 paid sick days per year and 17 days of Paid Personal Time (prorated upon hire with increasing accruals by tenure).

The Company reserves the right to modify or change these benefits programs at any time, with or without notice.

For Los Angeles County (unincorporated) Candidates:

Qualified applicants with arrest or conviction records will be considered for employment in accordance with all federal, state, and local laws including the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act. Our company believes that criminal history may have a direct, adverse and negative relationship on the following job duties, potentially resulting in the withdrawal of the conditional offer of employment:

1. Interacting and occasionally having unsupervised contact with internal/external clients and/or colleagues;

2. Appropriately handling and managing confidential information including proprietary and trade secret information and access to information technology systems; and

3. Exercising sound judgment.

About TikTok

TikTok is the leading destination for short-form mobile video. At TikTok, our mission is to inspire creativity and bring joy. TikTok's global headquarters are in Los Angeles and Singapore, and we also have offices in New York City, London, Dublin, Paris, Berlin, Dubai, Jakarta, Seoul, and Tokyo.

Why Join Us

Inspiring creativity is at the core of TikTok's mission. Our innovative product is built to help people authentically express themselves, discover and connect – and our global, diverse teams make that possible. Together, we create value for our communities, inspire creativity and bring joy - a mission we work towards every day.

We strive to do great things with great people. We lead with curiosity, humility, and a desire to make impact in a rapidly growing tech company. Every challenge is an opportunity to learn and innovate as one team. We're resilient and embrace challenges as they come. By constantly iterating and fostering an "Always Day 1" mindset, we achieve meaningful breakthroughs for ourselves, our company, and our users. When we create and grow together, the possibilities are limitless. Join us.

Diversity & Inclusion

TikTok is committed to creating an inclusive space where employees are valued for their skills, experiences, and unique perspectives. Our platform connects people from across the globe and so does our workplace. At TikTok, our mission is to inspire creativity and bring joy. To achieve that goal, we are committed to celebrating our diverse voices and to creating an environment that reflects the many communities we reach. We are passionate about this and hope you are too.

TikTok Accommodation

TikTok is committed to providing reasonable accommodations in our recruitment processes for candidates with disabilities, pregnancy, sincerely held religious beliefs or other reasons protected by applicable laws. If you need assistance or a reasonable accommodation, please reach out to us at

https://tinyurl.com/RA-request

Apply Now

Refine Your Search

microelectronics engineer jobs in san jose ca

SoC Digital Design Engineer, Multimedia Lab

SoC Digital Verification Engineer, Multimedia Lab

Senior SoC Digital Design Engineer, Multimedia Lab

Analog Engineer

Staff R&D Engineer (Catheter & Mechanical Systems) - NuevoSono

Senior SoC Digital Verification Engineer, Multimedia Lab

Automation Engineer (Machine Design)

Senior Engineer I - Product (New Product Introduction)

Semiconductor Process Engineer

Electrical Technician

Process Development Engineer

Senior Staff Engineer Test Technology & Solutions ATE 93K tester

R&D Engineer IC Design

Principal Optoelectronic Packaging Engineer

Field Application Engineer

Space Radiation Engineer, AI Hardware

Validation Engineering IP Program Manager, Principal

Package Development, Signal Integrity and Power Integrity Engineer, Senior Staff

SSRL Beamline Operations Engineer (SE2)

Team Lead, Field Application Engineer

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