Top 4605 Systems test engineer Jobs in San Jose Ca

ASIC DFT Engineer
Cisco Systems, Inc. —San Jose, CA
- $125,300 - $186,800 a year
- Full-time
- CAD
- Master's degree
- Senior level
Quick Apply
Electrical Test Engineer
TMP Worldwide India Private Limited for ERS US —San Jose, CA
- $71,000 - $108,000 a year
- Email
- Laboratory experience
- In-person
- Senior level
- AD&D insurance
- Paid holidays
Quick Apply
System QA Engineer
TMP Worldwide India Private Limited for ERS US —Cupertino, CA
- $83,000 - $110,000 a year
- Email
- Computer science
- Computer Science
- Bachelor of Science
- AD&D insurance
- Paid holidays
Quick Apply
Member of Technical Staff - Switch Systems Test Engineer
Coherent Corp. —Fremont, CA
- Overtime
- 7 years
- Bachelor of Science
- Office
Engr 3, Systems / Systems Verification Scientist III
Kaygen —Milpitas, CA
- $59 an hour
- Contract
- Background check
- Mid-level
- 3 years
Quick Apply
8d
Test Engineer
ISE LABS INC AND SUBSIDIARY —San Jose, CA
- $100,000 - $120,000 a year
- Full-time
- Computer Science
- Mid-level
- 3 years
Quick Apply
Senior Software Engineer
System One —San Jose, CA
- $65 - $73 an hour
- Contract
- Mid-level
- C++
- Electrical Engineering
- Health insurance
- Dental insurance
Quick Apply
PCIe QA/Validation Engineer ($180-220k)
Everforth, Cybercoders —San Jose, CA
- $100,000 - $220,000 a year
- Full-time
- Engineering
- Mid-level
- Quality control
- Health savings account
- Employee stock purchase plan
Quick Apply
QA Lead (SDET)
VIMO INC —Mountain View, CA
- $140,000 - $170,000 a year
- Java
- Analysis skills
- JavaScript
- Travel reimbursement
- Commuter assistance
Quick Apply
Software Engineer
iHealth Labs —Sunnyvale, CA
- Mid-level
- 3 years
- AWS
Quick Apply
Functional Testing Engineer
TETRAMEM INC —San Jose, CA
- $90,000 - $130,000 a year
- Full-time
- Mid-level
- Analysis skills
Quick Apply
4d
Lead QA Engineer
3Qi Labs —Santa Clara, CA
- Full-time
- Up to 50% travel
- Engineering
- Office
Software Engineer, Entry-Level
Muon Space —San Jose, CA
- $142,000 - $169,000 a year
- Full-time
- Hybrid work
- Computer Science
- Office
- Bachelor's degree
- Paid parental leave
- Paid holidays
AI Residency
1X —San Carlos, CA
- $10,000 a month
- Full-time
- Computer Science
- Research
- Mid-level
- Paid holidays
- Dental insurance
Quick Apply
Quality Assurance Engineer
Banyan Data Services —San Jose, CA
- Mid-level
- Office
- 3 years
- Paid parental leave
- Work from home
Software Development Engineer in Test (SDET)
i2 Data Systems —Santa Clara, CA
- Full-time
- Mid-level
- Health insurance
Quality Systems Engineer - Health
Apple —Cupertino, CA
- $120,900 - $201,400 a year
- Bachelor of Science
- Mid-level
- 3 years
- Employee stock purchase plan
- Health insurance
Test Engineer
Steck Systems —Milpitas, CA
- Computer science
- Computer Science
- Bachelor's degree
GenAI GenOS Engineer (Senior)
bintech group —Mountain View, CA
- $75 - $85 an hour
- Contract
- System design
- Java
- AWS
- Relocation assistance
Quick Apply
QA & Testing Engineer
EchoPixel —Silicon Valley, CA
- Computer Science
- Software troubleshooting
- Writing skills

I want to receive the latest job alert for systems test engineer in san jose ca

By signing in to your account, you agree to SimplyHired's Terms of Service and consent to our Cookie and Privacy Policy.

Explore jobs in more locations

systems test engineer jobs near san jose ca

ASIC DFT Engineer

Cisco Systems, Inc. -
San Jose, CA

Quick Apply

Job Details

Full-time
$125,300 - $186,800 a year

Qualifications

Electrical engineering
Perl
Simulation tools
Hardware diagnostics
Python
Debugging
Validation design
Automated test equipment (ATE)

Full Job Description

Who You'll Work With

You will be in the Silicon One development organization as an ASIC Implementation Engineer in San Jose, CA with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities.

What You'll Do

Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs.
Responsible for development of innovative DFT IP in collaboration with the multi-functional teams and play a key role in full chip design integration with the testability features coordinated in the RTL. Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.
Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug strategies.
The job requires the candidate to have the ability to craft and debug with minimal mentorship.

Who You Are

You are an ASIC Design for Test Hardware Engineer with 4+ years of related work experience with a broad mix of technologies including:

Minimum Requirements:

A Bachelor's or Master’s Degree, in Electrical or Computer Engineering required with at least 10 years of good experience of latest innovative trends in DFT, test and silicon engineering.
Good experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
Good experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design.
Experience working with Gate level simulation, debugging with VCS and other simulators.
Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687
Strong verbal skills and ability to thrive in a multifaceted environment
Scripting skills: Tcl, Python/Perl.

Preferred Skills:

Verilog design experience – developing custom DFT logic & IP integration; familiarity with functional verification
DFT CAD development – Test Architecture, Methodology and Infrastructure
Test Static Timing Analysis
Post silicon validation using DFT patterns.

XJ6

Quick Apply

Refine Your Search

systems test engineer jobs in san jose ca

ASIC DFT Engineer

Electrical Test Engineer

System QA Engineer

Member of Technical Staff - Switch Systems Test Engineer

Engr 3, Systems / Systems Verification Scientist III

Test Engineer

Senior Software Engineer

PCIe QA/Validation Engineer ($180-220k)

QA Lead (SDET)

Software Engineer

Functional Testing Engineer

Lead QA Engineer

Software Engineer, Entry-Level

AI Residency

Quality Assurance Engineer

Software Development Engineer in Test (SDET)

Quality Systems Engineer - Health

Test Engineer

GenAI GenOS Engineer (Senior)

QA & Testing Engineer

I want to receive the latest job alert for systems test engineer in san jose ca

Related Searches

Explore jobs in more locations

Job Seeker Tools

Employer Tools

Browse

Stay Connected