Top 436 Fpga engineer Jobs in Santa Clara, Ca

Emulation Engineer
Yoh, A Day & Zimmermann Company —Santa Clara, CA
- $180,000 - $280,000 a year
- Bachelor of Science
- Fair chance
- Linux
- Health savings account
- Disability insurance
Quick Apply
2d
FPGA Design Verification Engineer
UST —Mountain View, CA
- $182,000 - $273,000 a year
- Mid-level
- Master's degree
- Fair chance
- Paid jury duty
- Health savings account
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FPGA Design Engineer
Reliable Robotics Corporation —Mountain View, CA
- $185,000 - $245,000 a year
- Email
- Mid-level
- Electrical Engineering
- 401(k)
FPGA Engineer
EndoSec LLC —San Jose, CA
- Full-time
- Travel
- Senior level
- Python
Quick Apply
Hardware Engineer, FPGA
Normal Computing Corporation —Palo Alto, CA
- $200,000 - $280,000 a year
- Full-time
- Hybrid work
- C++
- Senior level
- Python
Sr. FPGA Engineer, Certification
Reliable Robotics Corporation —Mountain View, CA
- $215,000 - $300,000 a year
- Email
- Experience equivalent to degree accepted
- Senior level
- Electrical Engineering
11d
FPGA Design Engineer
Teradyne —San Jose, CA
- $135,400 - $216,600 a year
- Windows
- 3 years
- Master's degree
- Paid holidays
- Disability insurance
14d
System FPGA Engineer
Qualcomm —Santa Clara, CA
- $151,800 - $227,800 a year
- Computer science
- Computer Science
- Engineering
6d
Sr. FPGA Design Engineer
Reliable Robotics Corporation —Mountain View, CA
- $215,000 - $300,000 a year
- Email
- Senior level
- Electrical Engineering
Hardware Engineer - FPGA
Cisco Systems —Milpitas, CA
- $134,300 - $255,100 a year
- Full-time
- Office
- Master's degree
- Analysis skills
- Paid parental leave
- Paid holidays
13d
Hardware Verification Engineer, Entry Level
Synopsys —Sunnyvale, CA
- $90,000 - $136,000 a year
- Contract
- Computer science
- Computer Science
- Master's degree
FPGA / VLSI Engineer
E-Space —Saratoga, CA
- $120,000 - $220,000 a year
- Weekends as needed
- Office
- Master's degree
- Analysis skills
- Paid holidays
- Paid time off
Senior FPGA Design Engineer
Teradyne —San Jose, CA
- $170,400 - $272,600 a year
- Bachelor of Science
- Windows
- 8 years
- Paid holidays
- Disability insurance
14d
Staff FPGA Engineer
Vector Atomic —Pleasanton, CA
- $150,000 - $180,000 a year
- Full-time
- 7 years
- Master's degree
- Mentoring
- Paid parental leave
- Paid holidays
Quick Apply
Senior FPGA Design Verification Engineer
Intuitive Surgical —Sunnyvale, CA
- $152,000 - $257,200 a year
- Day shift
- Machine learning
- Fair chance
- In-person
FPGA Engineer, Vehicle Software
Tesla —Palo Alto, CA
- $140,000 - $300,000 a year
- Full-time
- Writing skills
- Mid-level
- Electrical Engineering
- Commuter assistance
- Health savings account
Senior FPGA Engineer
Vector Atomic —Pleasanton, CA
- $130,000 - $155,000 a year
- Full-time
- 5 years
- Master's degree
- Linux
- Paid parental leave
- Paid holidays
Quick Apply
Hardware Engineer
Cisco Systems —Milpitas, CA
- $122,000 - $222,400 a year
- Full-time
- Mid-level
- Master's degree
- Doctor of Philosophy
- Paid parental leave
- Paid holidays
FPGA Engineer: Physical AI & Robotics
Advanced Micro Devices, Inc —San Jose, CA
- Hybrid work
- Computer Science
- Master's degree
- Analysis skills
6d
Sensing & Imaging FPGA Engineer
Apple —Cupertino, CA
- $184,700 - $324,800 a year
- Bachelor of Science
- Mid-level
- Analysis skills
- Employee stock purchase plan
- Health insurance

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Emulation Engineer

Yoh, A Day & Zimmermann Company -
Santa Clara, CA

Quick Apply

Job Details

$180,000 - $280,000 a year
2 days ago

Benefits

Health savings account
Disability insurance
Health insurance
Dental insurance
401(k)
Employee assistance program
Vision insurance
Referral program

Qualifications

SystemVerilog
Debugging

Full Job Description

Palladium / ASIC / Networking SoC
Overview
This Bay Area startup is developing next-generation Ethernet networking infrastructure optimized for large-scale AI and GPU cluster environments. They are seeking an Emulation Engineer to develop, maintain, and optimize hardware emulation environments for complex networking ASICs and SoCs. This role will focus on accelerating pre-silicon validation, enabling hardware/software integration, and supporting system-level verification using Cadence Palladium.
Responsibilities

Develop, configure, and maintain Cadence Palladium emulation environments for complex ASIC and SoC designs.
Support design bring-up, hardware/software co-validation, and system-level debug on emulation platforms.
Collaborate with RTL, Design Verification, Architecture, and Software teams to enable pre-silicon validation and accelerate product development.
Debug emulation compile, runtime, and performance issues while optimizing emulation capacity and throughput.
Develop automation and scripting to improve emulation workflows, regression execution, and debug efficiency.

Requirements

5-15 years of ASIC or SoC verification, emulation, or validation experience.
Hands-on experience with Cadence Palladium (strongly preferred).
Experience supporting hardware emulation, hardware/software co-verification, or pre-silicon validation.
Strong understanding of SystemVerilog, UVM, and RTL debug.
Experience with networking ASICs, Ethernet, PCIe, or high-speed digital designs.
Proficiency with Linux environments and scripting using Python, Perl, TCL, or Shell.
BS/MS in Electrical Engineering, Computer Engineering, or related discipline.

Nice to Have

Experience with networking ASICs, Ethernet switch silicon, NICs, RDMA, RoCE, or AI networking fabrics.
Experience with additional emulation or prototyping platforms such as ZeBu, Veloce, or FPGA prototyping.
Exposure to firmware validation, embedded software bring-up, or hardware/software co-design.
Experience improving emulation infrastructure, automation, or regression frameworks.
Background from semiconductor, networking, or AI infrastructure companies.

Estimated Min Rate: $180k annually
Estimated Max Rate: $280k annually

What’s In It for You?
We welcome you to be a part of the largest and legendary global staffing companies to meet your career aspirations. Yoh’s network of client companies has been employing professionals like you for over 65 years in the U.S., UK and Canada. Join Yoh’s extensive talent community that will provide you with access to Yoh’s vast network of opportunities and gain access to this exclusive opportunity available to you. Benefit eligibility is in accordance with applicable laws and client requirements. Benefits include:

Medical, Prescription, Dental & Vision Benefits (for employees working 20+ hours per week)
Health Savings Account (HSA) (for employees working 20+ hours per week)
Life & Disability Insurance (for employees working 20+ hours per week)
MetLife Voluntary Benefits
Employee Assistance Program (EAP)
401K Retirement Savings Plan
Direct Deposit & weekly epayroll
Referral Bonus Programs
Certification and training opportunities

Note: Any pay ranges displayed are estimations. Actual pay is determined by an applicant's experience, technical expertise, and other qualifications as listed in the job description. All qualified applicants are welcome to apply.

Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Visit https://www.yoh.com/applicants-with-disabilities to contact us if you are an individual with a disability and require accommodation in the application process.

For California applicants, qualified applicants with arrest or conviction records will be considered for employment in accordance with the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act. All of the material job duties described in this posting are job duties for which a criminal history may have a direct, adverse, and negative relationship potentially resulting in the withdrawal of a conditional offer of employment.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

By applying and submitting your resume, you authorize Yoh to review and reformat your resume to meet Yoh’s hiring clients’ preferences. To learn more about Yoh’s privacy practices, please see our Candidate Privacy Notice: https://www.yoh.com/privacy-notice

Stay Safe During Your Job Search
Fraudulent recruiting communications have become increasingly common. Emails from Yoh recruiters will only come from an @yoh.com email address. Yoh will never ask candidates to pay fees, purchase equipment, send gift cards, or transfer funds as part of the recruiting or hiring process. If you receive a communication that appears suspicious or requests payment, contact Yoh directly before responding or sharing personal information.
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Refine Your Search

fpga engineer jobs in santa clara, ca

Emulation Engineer

FPGA Design Verification Engineer

FPGA Design Engineer

FPGA Engineer

Hardware Engineer, FPGA

Sr. FPGA Engineer, Certification

FPGA Design Engineer

System FPGA Engineer

Sr. FPGA Design Engineer

Hardware Engineer - FPGA

Hardware Verification Engineer, Entry Level

FPGA / VLSI Engineer

Senior FPGA Design Engineer

Staff FPGA Engineer

Senior FPGA Design Verification Engineer

FPGA Engineer, Vehicle Software

Senior FPGA Engineer

Hardware Engineer

FPGA Engineer: Physical AI & Robotics

Sensing & Imaging FPGA Engineer

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