Top 5346 Engineering Jobs in Palo Alto, Ca

Hardware Engineer, RTL
Normal Computing Corporation —Palo Alto, CA
- $200,000 - $400,000 a year
- Full-time
- Hybrid work
- Senior level
Thermal Test Engineer
Chroma ATE, Inc. —Milpitas, CA
- $90,000 - $120,000 a year
- Full-time
- Mid-level
- 3 years
- Master's degree
- Paid parental leave
- Health savings account
Quick Apply
Senior Civil Engineer
Transtech Engineers, Inc. —Los Gatos, CA
- $176,800 - $228,800 a year
- Full-time
- 5 years
- Bachelor's degree
- Contracts
- Health insurance
- Dental insurance
Quick Apply
14d
Process Engineer MS/PhD
eJoule Inc —Fremont, CA
- $65,000 - $100,000 a year
- Full-time
- Master's degree
- Bachelor's degree
- Doctor of Philosophy
- Health insurance
- Dental insurance
Quick Apply
Teradyne Engineer
SYD Precision Manufacturing LLC —Hayward, CA
- $65,614.47 - $104,309.90 a year
- Full-time
- Mid-level
- Bachelor's degree
- Continuous improvement
- Paid time off
- Employee assistance program
Quick Apply
1d
Signal Integrity Engineer
PTEC Solutions Inc. —San Jose, CA
- $95,000 - $105,000 a year
- Full-time
- System design
- Laboratory experience
- Mid-level
- Health insurance
- Dental insurance
Quick Apply
Product & Process Development Engineer
Foxconn —Cupertino, CA
- $100,000 - $150,000 a year
- Full-time
- Hybrid work
- Background check
- CAD
- Bachelor's degree
- Health savings account
- Relocation assistance
Quick Apply
Manufacturing Engineer II (Project Leader)
CHawk Technology —Hayward, CA
- $116,000 - $137,000 a year
- Full-time
- ERP systems
- Mid-level
- 3 years
- Relocation assistance
- Health insurance
Quick Apply
RF Integration Engineer
PTEC Solutions Inc. —San Jose, CA
- $100,000 - $115,000 a year
- Temporary
- Laboratory experience
- Mid-level
- C++
- Health insurance
- Dental insurance
Quick Apply
Senior Civil Engineer - Roadway Design (FT - Hybrid)
CSG Consultants, Inc. —Foster City, CA
- $142,000 - $165,000 a year
- Part-time
- 6 years
- Office
- Driver's License
- Commuter assistance
- Health savings account
Quick Apply
Controls Engineering Manager
E Tech Group —San Jose, CA
- $160,000 - $200,000 a year
- Bachelor of Science
- Ability to climb stairs
- Ability to lift 50 pounds
- Paid holidays
- Health insurance
Quick Apply
Senior Traffic Analyst
Aspen Environmental Group —California
- $115,000 - $145,000 a year
- Email
- Remote
- Microsoft Excel
- Data analysis skills
- 11+ years
Quick Apply
Test Supervisor
dB Control —Fremont, CA
- $80,000 - $100,000 a year
- Full-time
- Mid-level
- Analysis skills
- Bachelor's degree
- Health savings account
- Health insurance
Quick Apply
Senior Cable Manufacturing Engineer
Y.C. Cable USA, Inc. —Fremont, CA
- $90,000 - $96,000 a year
- Full-time
- 5 years
- Engineering
- Mentoring
- Health insurance
- Dental insurance
Quick Apply
Senior Equipment Engineer
PROCEPT BioRobotics Corporation —San Jose, CA
- Full-time
- 5 years
- Bachelor of Science
- Engineering
- Opportunities for advancement
Quick Apply
Principal Opto-Mechanical Engineer
ASML —San Jose, CA
- $177,000 - $295,000 a year
- Full-time
- Doctor of Philosophy
- Travel
- Manufacturing
- Paid holidays
- Health insurance
Lead Electrical Design Engineer
Coherent Corp. —Fremont, CA
- $114,375 - $195,875 a year
- Overtime
- 7 years
- Office
- Master's degree
Research scientist InP laser designer
Vertilite Inc. —San Jose, CA
- $87,527.47 - $164,513.50 a year
- Full-time
- Doctoral degree
- English
- Mid-level
- Health insurance
- Dental insurance
Quick Apply
Engineering Operations Manager
ALZETA Corporation —San Jose, CA
- $150,000 - $190,000 a year
- Full-time
- 7 years
- Engineering
- Mentoring
Quick Apply
Senior Controls Engineer
E Tech Group —Fremont, CA
- $90,000 - $130,000 a year
- Customer service
- Engineering
- Databases
- Paid holidays
- Health insurance
Quick Apply

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engineering jobs near palo alto, ca

Hardware Engineer, RTL

Normal Computing Corporation
Palo Alto, CA

Apply Now

Job Details

Full-time
$200,000 - $400,000 a year

Qualifications

Verification (System development task)
Tooling
AI tools proficiency
Electronics design
System design for system development
SoC
Digital circuit design
Design engineering
Open source contribution
Engineering functional testing
SystemVerilog
Senior level
Debugging

Full Job Description

About Normal Computing

Normal Computing builds silicon that turns thermal noise from an obstacle into a computational resource. Conventional chips spend most of their energy forcing determinism onto physics; ours compute with it. Stochastic, in-memory, asynchronous: the result is 10-100× more AI inference per dollar, per watt.

We co-design the full stack: AI-native EDA systems in production with the world's largest semiconductor companies, and the advanced ASICs they make possible. Backed by $85M+ from the world's leading deep-tech investors and built by scientists, engineers, and operators from the labs that built modern computing.

Normal works as one team across New York, Silicon Valley, London, Copenhagen, and Seoul. We hire people who want the hardest version of their craft, across every discipline, at every seniority.

The Role

As an RTL Design Engineer at Normal, you will design and verify the digital logic at the heart of Normal's thermodynamic hardware. This work sits at the intersection of classical ASIC design, novel computing architectures, and a development environment where the hardware and the algorithms are built together, not in sequence.

You will own RTL from microarchitecture to tapeout: writing microarchitecture specifications, creating synthesizable SystemVerilog, working with design verification engineers fully test the design using conventional and formal methods, and working closely with physical design to make sure the design meets area and timing constraints. Because Normal's chips are not standard accelerators, the RTL engineer here is closer to first-principles decisions than at a larger company. You will be shaping architecture, not just implementing it.

This is a role for an engineer who collaborates effectively across teams, including architecture, verification and physical design. The strongest candidates have taped out silicon, written RTL and helped close coverage, and are comfortable working in an environment where the specification is still being developed in parallel.

What You Will Own

RTL Design: Write and own synthesizable RTL in SystemVerilog across blocks ranging from datapath logic to control and memory interfaces.
Microarchitecture: Work with architecture to translate high-level specifications into implementable microarchitectures.
Verification: Work closely with the verification team to review verification plans, assist on debug, and become a partner in closing coverage.
Physical Design Collaboration: Collaborate with physical design on timing closure, floorplanning constraints, and DFT.
Design Reviews: Participate in design reviews and contribute to architecture decisions, not just implementation.
Tapeout & Bring-up: Support tapeout preparation, integration, and post-silicon bring-up as needed.

What Makes You a Great Fit

Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route
Experience in closing coverage to a high level
At least one tapeout in your background, from any node and any company size
Experience working on datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront
Strong debugging instincts across simulation, waveforms, and formal counterexamples
Ability to work directly with architects and physical designers without needing a large intermediary layer
Industry experience in ASIC or SoC design

Bonus Points

Experience at an AI chip company where design and verification were tightly coupled
Open-source RTL contributions to projects like Chipyard, OpenTitan, or CVA6
Familiarity with RISC-V or other open ISAs
Experience with AI-assisted RTL or EDA tooling in your design workflow
Exposure to physical design constraints, floorplanning, or timing-driven RTL development

Equal Employment Opportunity Statement

Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.

Accessibility Accommodations

Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at [email protected].

Privacy Notice

By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

Compensation Range: $200K - $400K

Apply Now

Refine Your Search

engineering jobs in palo alto, ca

Hardware Engineer, RTL

Thermal Test Engineer

Senior Civil Engineer

Process Engineer MS/PhD

Teradyne Engineer

Signal Integrity Engineer

Product & Process Development Engineer

Manufacturing Engineer II (Project Leader)

RF Integration Engineer

Senior Civil Engineer - Roadway Design (FT - Hybrid)

Controls Engineering Manager

Senior Traffic Analyst

Test Supervisor

Senior Cable Manufacturing Engineer

Senior Equipment Engineer

Principal Opto-Mechanical Engineer

Lead Electrical Design Engineer

Research scientist InP laser designer

Engineering Operations Manager

Senior Controls Engineer

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