Top 420 Integration lead Jobs in San Jose, Ca

Lead ASIC DFT Engineer
Cyient —San Jose, CA
- $80 - $85 an hour
- Full-time
- Analysis skills
- Mentoring
- In-person
Quick Apply
Lead Application Engineer (8146)
Advantest —San Jose, CA
- $129,000 - $200,000 a year
- Full-time
- Computer Science
- Software troubleshooting
- 5 years
- Health insurance
- Dental insurance
Quick Apply
Senior Staff Software Engineer, Integrations (Tech Lead) — Veza
ServiceNow —Santa Clara, CA
- $190,900 - $334,100 a year
- Online Application
- Hybrid work
- Azure
- 11+ years
- Office
- Employee stock purchase plan
- Health insurance
Quick Apply
Lead Optical Product Engineer
Coherent Corp. —Fremont, CA
- $100,625 - $172,250 a year
- Full-time
- Bachelor of Science
- Office
- 3 years
Hardware Operations Lead / Senior Hardware Technician
VIA Technologies, Inc. —Fremont, CA
- $40 - $45 an hour
- Full-time
- Schematics
- Mid-level
- 3 years
- Health insurance
- Dental insurance
Quick Apply
14d
Lead Integration Architect
Agilent Technologies Inc —Santa Clara, CA
- $153,040 - $286,950 a year
- Full-time
- System design
- Laboratory experience
- Senior level
3d
Display Integration Lead
Meta —Sunnyvale, CA
- $173,000 - $245,000 a year
- Master's degree
- 8 years
- Mentoring
Product Integration Lead
Aurora Innovation —Mountain View, CA
- $197,000 - $316,000 a year
- Hybrid work
- Office
- Product management
- Mentoring
Quick Apply
14d
Lead, Engineering Excellence
Bain & Co. —Palo Alto, CA
- $179,875 - $203,925 a year
- Full-time
- Hybrid work
- Azure
- Computer Science
- Office
- Wellness program
- Paid holidays
Quick Apply
CRM Lead
Hudson Manpower —San Jose, CA
- Full-time
- 5 years
- HIPAA
- Continuous improvement
Quick Apply
Director, APEX Integration Deal Lead
ServiceNow —Santa Clara, CA
- $180,200 - $315,400 a year
- Online Application
- Hybrid work
- Residential
- Fair chance
- Senior level
- Employee stock purchase plan
- Health insurance
Quick Apply
Lead Software Test Infrastructure Engineer
ALTEN Technology USA —Palo Alto, CA
- $135,000 - $155,000 a year
- Computer Science
- Pass drug screening
- System design
- Opportunities for advancement
Quick Apply
Lead Installation Technician (High-End Resi AV, Lighting, Shading, Control)
Regent5 —San Carlos, CA
- $40 - $60 an hour
- Online Application
- Management
- Construction site
- Mid-level
- Paid holidays
- Health insurance
3d
Lead Verification & Validation Engineer
ALTEN Technology USA —Palo Alto, CA
- $140,000 - $175,000 a year
- 5 years
- Pass drug screening
- Analysis skills
- Opportunities for advancement
Quick Apply
Lead Production Technician
Air Liquide —Fremont, CA
- $34 - $46 an hour
- 12 hour shift
- Word processing
- English
- Research
6h
Lead Production Technician
Air Liquide —Fremont, CA
- $34 - $46 an hour
- 12 hour shift
- Word processing
- English
- Research
6h
Lead Production Technician
Air Liquide —Fremont, CA
- $34 - $46 an hour
- 12 hour shift
- Word processing
- English
- Research
6h
Portfolio & Program Management Office (PMO) Lead - Finance Transformation
Apple —Cupertino, CA
- $186,200 - $280,300 a year
- Weekends as needed
- 5 years
- Finance
- Bachelor's degree
- Employee stock purchase plan
- Health insurance
1d
Connectivity Integration Lead, Data Center Infrastructure
Meta —Menlo Park, CA
- $178,000 - $245,000 a year
- Up to 50% travel
- System design
- 11+ years
Domain Tech Lead — Infrastructure Patching Automation (Mainframe & AS/400)
Deloitte —San Jose, CA
- $134,000 - $265,000 a year
- Full-time
- 7 years
- Azure
- Up to 50% travel
2d

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Lead ASIC DFT Engineer

Cyient -
San Jose, CA

Quick Apply

Job Details

Full-time | Contract
$80 - $85 an hour

Qualifications

Analog circuit design
Engineering development testing
Electronics functional testing
Integrated circuits (ICs)
Ramps
Analysis skills
SoC
System architecture design
Simulation tools
Root cause analysis
Test analysis
Python
Debugging
Cross-functional communication

Full Job Description

Title - Lead ASIC DFT Engineer

Location – San Jose, CA.

Duration - Contract

Job Description

Experience

10+ years of hands-on experience in ASIC Design-for-Test (DFT)

Role Summary

We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.

The ideal candidate will have strong hands-on expertise in DFT fundamentals, fault models, test coverage, diagnosis, and debug, as well as the ability to evaluate and adopt emerging DFT methodologies and architecture schemes to improve robustness, quality, and yield.

Key Responsibilities

Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
Act as a technical escalation point for advanced DFT and post-silicon debug issues.
Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.

Required Skills & Qualifications

Strong hands-on experience in ASIC DFT with end-to-end ownership.
Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.
Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.
Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.
Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.
Experience with MBIST implementation and verification; SMS experience preferred.
Experience with scan architecture and scan chain stitching; Tessent/SSN experience preferred.
Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and physical design implementation.
Proven post-silicon debug and silicon bring-up experience.
Exposure to large SoC designs, hierarchical DFT flows, and multi-domain integration challenges.
Strong communication skills and the ability to work independently with minimal ramp-up.

Preferred Experience

MBIST post-silicon validation.
ATPG simulations and fault coverage debug.
DFT RTL, DFD, DFT verification, and IP-level DFT integration.
DFT SDC creation and DFT timing closure support.
Boundary scan, iJTAG, SSN, and design-for-debug methodologies.
TCL/PERL scripting for DFT automation, reporting, and debug.
Experience working across multiple ASIC technology nodes and complex product development cycles.
Familiarity with yield learning, diagnosis, and manufacturing test optimization.

Pay: $80.00 - $85.00 per hour

Work Location: In person

Quick Apply

Refine Your Search

integration lead jobs in san jose, ca

Lead ASIC DFT Engineer

Lead Application Engineer (8146)

Senior Staff Software Engineer, Integrations (Tech Lead) — Veza

Lead Optical Product Engineer

Hardware Operations Lead / Senior Hardware Technician

Lead Integration Architect

Display Integration Lead

Product Integration Lead

Lead, Engineering Excellence

CRM Lead

Director, APEX Integration Deal Lead

Lead Software Test Infrastructure Engineer

Lead Installation Technician (High-End Resi AV, Lighting, Shading, Control)

Lead Verification & Validation Engineer

Lead Production Technician

Lead Production Technician

Lead Production Technician

Portfolio & Program Management Office (PMO) Lead - Finance Transformation

Connectivity Integration Lead, Data Center Infrastructure

Domain Tech Lead — Infrastructure Patching Automation (Mainframe & AS/400)

I want to receive the latest job alert for integration lead in san jose, ca

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