Top 357 Implementation lead Jobs in Santa Clara Ca

Lead ASIC DFT Engineer
Cyient —San Jose, CA
- $80 - $85 an hour
- Full-time
- Analysis skills
- Mentoring
- In-person
Quick Apply
Lead Teacher - Infant/Toddler (East Palo Alto) $2,000 Sign on Bonus
Kidango —Sunnyvale, CA
- $38.04 an hour
- Evenings as needed
- Bilingual
- Classroom
- 18 years or older
Quick Apply
Lead Customer Engineer
Everforth —Santa Clara, CA
- $95,000 - $150,000 a year
- Full-time
- Computer science
- Computer Science
- Mid-level
- Dental insurance
- 401(k)
Quick Apply
Lead, Engineering Excellence
Bain & Co. —Palo Alto, CA
- $179,875 - $203,925 a year
- Full-time
- Hybrid work
- Azure
- Computer Science
- Office
- Wellness program
- Paid holidays
Quick Apply
CRM Lead
Hudson Manpower —San Jose, CA
- Full-time
- 5 years
- HIPAA
- Continuous improvement
Quick Apply
School Leader of Innovation
Rocketship Public Schools —San Jose, CA
- $130,000 - $135,000 a year
- Full-time
- School experience
- Classroom
- Teaching Certification
- Health insurance
- Flexible spending account
Quick Apply
13d
Program Lead - Operational Excellence (Global Workplace Services)
KLA —Milpitas, CA
- $121,500 - $206,600 a year
- Full-time
- Engineering
- Office
- 8 years
- Employee stock purchase plan
- Paid holidays
ASIC DFT Emulation Technical Lead
Cisco Systems —San Jose, CA
- $163,600 - $303,100 a year
- Full-time
- 3 years
- Master's degree
- Bachelor's degree
- Paid parental leave
- Paid holidays
14h
Chip Lead / ASIC Director
Advanced Micro Devices, Inc —San Jose, CA
- Hybrid work
- Master's degree
- Doctor of Philosophy
- Senior level
Production Planning and Change Governance Lead
Google —Sunnyvale, CA
- $240,000 - $334,000 a year
- Full-time
- 5 years
- Office
- Bachelor's degree
3d
Technology Internal Audit Lead - Product Technology & Trust and Safety
TikTok —San Jose, CA
- $108,000 - $220,400 a year
- 5 years
- Office
- Continuous improvement
- Paid parental leave
- Paid holidays
ASIC DFT STA Technical Lead
Cisco Systems —San Jose, CA
- $148,800 - $277,400 a year
- Full-time
- 3 years
- Master's degree
- Analysis skills
- Paid parental leave
- Paid holidays
People Systems Lead - HRIS
Lambda —San Jose, CA
- $279,000 - $310,000 a year
- Full-time
- Hybrid work
- Office
- SQL
- Presentation skills
- Health insurance
- Dental insurance
Supply Chain Systems & Process Lead
Lambda —San Jose, CA
- $143,000 - $190,000 a year
- Full-time
- Hybrid work
- 7 years
- Oracle
- Office
- Health insurance
- Dental insurance
Technology and Innovation - Lead to Cash Delivery Lead (Salesforce)
Riveron —San Jose, CA
- $170,000 - $240,000 a year
- Full-time
- Hybrid work
- System design
- Mentoring
- Agile
- Health insurance
- Dental insurance
Fellow - Lead SoC Architect
Advanced Micro Devices, Inc —San Jose, CA
- System design
- Doctor of Philosophy
- Mentoring
Senior Enterprise Customer Success Manager & Service Delivery Lead
Palo Alto Networks —Santa Clara, CA
- $123,000 - $200,000 a year
- Full-time
- 5 years
- Office
- Product management
10d
Lead AI Transformation Strategist - TikTok (San Jose)
TikTok —San Jose, CA
- $159,000 - $288,000 a year
- 5 years
- Office
- Analysis skills
- Paid parental leave
- Paid holidays
Strategy and Operations Lead
Google —Mountain View, CA
- $152,000 - $222,000 a year
- Full-time
- Sales
- Office
- Analysis skills
14d
Lead Integration Architect
Agilent Technologies Inc —Santa Clara, CA
- $153,040 - $286,950 a year
- Full-time
- System design
- Laboratory experience
- Senior level
3d

I want to receive the latest job alert for implementation lead in santa clara ca

By signing in to your account, you agree to SimplyHired's Terms of Service and consent to our Cookie and Privacy Policy.

Explore jobs in more locations

implementation lead jobs near santa clara ca

Lead ASIC DFT Engineer

Cyient -
San Jose, CA

Quick Apply

Job Details

Full-time | Contract
$80 - $85 an hour

Qualifications

Analog circuit design
Engineering development testing
Electronics functional testing
Integrated circuits (ICs)
Ramps
Analysis skills
SoC
System architecture design
Simulation tools
Root cause analysis
Test analysis
Python
Debugging
Cross-functional communication

Full Job Description

Title - Lead ASIC DFT Engineer

Location – San Jose, CA.

Duration - Contract

Job Description

Experience

10+ years of hands-on experience in ASIC Design-for-Test (DFT)

Role Summary

We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.

The ideal candidate will have strong hands-on expertise in DFT fundamentals, fault models, test coverage, diagnosis, and debug, as well as the ability to evaluate and adopt emerging DFT methodologies and architecture schemes to improve robustness, quality, and yield.

Key Responsibilities

Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
Act as a technical escalation point for advanced DFT and post-silicon debug issues.
Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.

Required Skills & Qualifications

Strong hands-on experience in ASIC DFT with end-to-end ownership.
Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.
Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.
Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.
Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.
Experience with MBIST implementation and verification; SMS experience preferred.
Experience with scan architecture and scan chain stitching; Tessent/SSN experience preferred.
Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and physical design implementation.
Proven post-silicon debug and silicon bring-up experience.
Exposure to large SoC designs, hierarchical DFT flows, and multi-domain integration challenges.
Strong communication skills and the ability to work independently with minimal ramp-up.

Preferred Experience

MBIST post-silicon validation.
ATPG simulations and fault coverage debug.
DFT RTL, DFD, DFT verification, and IP-level DFT integration.
DFT SDC creation and DFT timing closure support.
Boundary scan, iJTAG, SSN, and design-for-debug methodologies.
TCL/PERL scripting for DFT automation, reporting, and debug.
Experience working across multiple ASIC technology nodes and complex product development cycles.
Familiarity with yield learning, diagnosis, and manufacturing test optimization.

Pay: $80.00 - $85.00 per hour

Work Location: In person

Quick Apply

Refine Your Search

implementation lead jobs in santa clara ca

Lead ASIC DFT Engineer

Lead Teacher - Infant/Toddler (East Palo Alto) $2,000 Sign on Bonus

Lead Customer Engineer

Lead, Engineering Excellence

CRM Lead

School Leader of Innovation

Program Lead - Operational Excellence (Global Workplace Services)

ASIC DFT Emulation Technical Lead

Chip Lead / ASIC Director

Production Planning and Change Governance Lead

Technology Internal Audit Lead - Product Technology & Trust and Safety

ASIC DFT STA Technical Lead

People Systems Lead - HRIS

Supply Chain Systems & Process Lead

Technology and Innovation - Lead to Cash Delivery Lead (Salesforce)

Fellow - Lead SoC Architect

Senior Enterprise Customer Success Manager & Service Delivery Lead

Lead AI Transformation Strategist - TikTok (San Jose)

Strategy and Operations Lead

Lead Integration Architect

I want to receive the latest job alert for implementation lead in santa clara ca

Related Searches

Explore jobs in more locations

Job Seeker Tools

Employer Tools

Browse

Stay Connected