Top 557 Camera algorithm engineer Jobs

FPGA Image Processing Engineer
SiOnyx, LLC —Beverly, MA
- $130,000 - $210,000 a year
- Full-time
- Hybrid work
- Background check
- Computer Science
- Bachelor of Science
- Paid parental leave
- Health insurance
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Autonomy Engineer, Senior
BOOZ, ALLEN & HAMILTON, INC. —Honolulu, HI
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Booz Allen —Beavercreek, OH
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Booz Allen —Shaw AFB, SC
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Booz Allen —Norfolk, VA
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Moonshot Aerospace —Madison, AL
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Camera DV Engineer
Qualcomm —San Diego, CA
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Booz Allen —El Segundo, CA
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General Atomics —Charlottesville, VA
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Booz Allen —Beavercreek, OH
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Application Security Engineer
Booz Allen —Fort Meade, MD
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Integer Technologies —Baton Rouge, LA
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Senior Machine Learning Engineer
Canopy —Detroit, MI
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Tactical Communications SME
Booz Allen —California, MD
- $86,900 - $198,000 a year
- Full-time
- 5 years
- Engineering
- Data analysis skills
- Health insurance
- Flexible spending account

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FPGA Image Processing Engineer

SiOnyx, LLC -
Beverly, MA

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Job Details

Full-time
$130,000 - $210,000 a year

Benefits

Paid parental leave
Health insurance
Dental insurance
401(k)
Flexible spending account
Paid time off
401(k) 4% Match
Parental leave
Employee assistance program
Vision insurance
401(k) matching
Employee discount
Professional development assistance
Life insurance
Referral program

Qualifications

Teamwork
Tooling
FPGA
Bachelor of Science
AI tools proficiency
Software implementation
VHDL
Maintenance
Electrical engineering
Bachelor's degree
FPGA circuit design
Python

Full Job Description

Job Title: FPGA Image Processing Engineer

Department: Advanced R&D

Reports To: Chief Technology Officer

Location: Beverly, MA (preferred), or Santa Barbara, CA

Position Type: Full-Time, Exempt, On-site

Definition:

This role is a game-changing position that is destined to bring AI into FPGAs. SIONYX is known for pioneering digital night vision and has always been at the forefront of low- and no- light imaging systems. We are accelerating our leadership through the use of AI across our entire business, including our silicon compute layer. We are looking for a forward leaning, agile and action-oriented engineer who is motivated by challenging the status quo and never says ‘because that how we have always done it…’. We want an innovative change agent who can leverage the revolutionary capabilities of AI inside our world-leading imaging systems.

Using AI, the FPGA Image Processing Engineer will drive the design and FPGA implementation of low-latency advanced image processing pipelines for SIONYX’s world-class ultra-low light image sensors and thermal sensors. You will maintain and expand our existing FPGA pipeline by improving existing ISP blocks and creating new blocks based on algorithms generated by you or other members of the team. Your work will directly improve the performance of our state-of-the-art low-light cameras for both commercial and defense applications. That means you are going to be helping lead the charge for American leadership in night-vision for both consumer and military customers. You must be comfortable working in a fast-paced, results-oriented environment, and you will provide thoroughness in your development, evaluation, and documentation processes.

Essential Duties and Responsibilities:

· Use AI tools such as Claude Code to efficiently drive code development

· Implement image processing pipeline for low-light and thermal sensors in VHDL

· Work closely with engineering, marketing and customer support teams to identify improvements in image processing

· Using Python, Matlab or similar create software representations of new image processing algorithms developed by you or the team, then efficiently implement in VHDL

· Work closely with 3rd party vendor partners

· Work closely with the embedded firmware team to support them implementing firmware required to drive the hardware image processing pipeline

· Maintain FPGA toolchain, build environment and version control

· Contribute to system architecture design and FPGA selection

· Solid documentation skills, including use of tools like GitHub and Confluence/Jira

Required Experience:

· Experienced and passionate about using AI tools such as Claude Code to transform the trade.

· 3+ years of experience with FPGA design and VHDL, especially memory-efficient architectures. Experience with Efinix and Polarfire; FPGAs a plus.

· Experienced setting up and maintaining the FPGA tool chain and build environment

· Experience with FPGA implementations of image processing pipelines for low-light and thermal cameras a plus

· Knowledge of image processing algorithms for visible, low light and thermal cameras (such as AE/AGC/AWB, 2D/3D noise reduction, delayering, tonemapping, etc.) a plus

Key Skills:

· Strong technical and communication skills, with relationship-building capabilities

· Strong collaboration skills and assertiveness to help influence key decisions

· Excellent oral and written communication skills – especially in a remote, distributed environment

· Strong analytical and problem-solving abilities

· Attention to detail and design optimization mindset

· Ability to work in cross-functional teams

· Effective communication and documentation skills

Required Education:

· BS or more advanced degree in Electrical Engineering, Computer Science, Physics or similar

Physical Requirements:

· Prolonged periods sitting at a desk and working on a computer.

· Must be able to access and navigate the production facility.

· Must be able to lift up to 15 pounds at times.

· Travel up to 25%. We have locations around the country, including Beverly, MA, Santa Barbara, CA and Whitefish, MT, so you will need to have the ability and willingness to travel, including internationally

· US Citizen or green card holder required

Pay: $130,000.00 - $210,000.00 per year

Benefits:

401(k)
401(k) 4% Match
Dental insurance
Employee assistance program
Employee discount
Flexible spending account
Health insurance
Life insurance
Paid parental leave
Paid time off
Professional development assistance
Referral program
Vision insurance

Application Question(s):

Are you a US Citizen or green card holder? Required for position.
Are you able to commute into our Beverly, MA or Santa Barbara, CA office a minimum of 4 days per week?

Education:

Bachelor's (Required)

Experience:

FPGA design: 3 years (Required)

Willingness to travel:

25% (Required)

Work Location: In person

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Refine Your Search

camera algorithm engineer jobs

FPGA Image Processing Engineer

Graphics Engineer

Senior Staff Mapping and Navigation Engineer

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AI/ML Engineer with RE/VR proficiency and a TS or higher clearance (Mid-Sr Level) Cipher Tech

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Data Engineer

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